Multilevel interconnect structure of an integrated

专利名称：Multilevel interconnect structure of an

integrated circuit having air gaps and pillarsseparating levels of interconnect

发明人：Robert Dawson,Mark W. Michael,William S.

Brennan,Basab Bandyopadhyay,H. JimFulford, Jr.,Fred N. Hause

申请号：US09/067425申请日：19980428公开号：US05998293A公开日：19991207

摘要：An improved multilevel interconnect structure is provided. The interconnectstructure includes pillars spaced from each other across a wafer. The pillars are placedbetween levels of interconnect or between an interconnect level and a semiconductorsubstrate. The pillars are spaced from each other by an air gap, such that each conductorwithin a level of interconnect is spaced by air from one another. Furthermore, eachconductor within one level of interconnect is spaced by air from each conductor withinanother level of interconnect. Air gaps afford a smaller interlevel and intralevelcapacitance within the multilevel interconnect structure, and a smaller parasitic

capacitance value affords minimal propagation delay and cross-coupling noise of signalssent through the conductors. The air gaps are formed by dissolving a sacrificial dielectric,and the conductors are prevented from bending or warping in regions removed ofsacrificial dielectric by employing anodization on not just the upper surfaces of eachconductor, but the sidewalls as well. The upper and sidewall anodization provides a more

rigid metal conductor structure than if merely the upper or sidewall surfaces wereanodized. Accordingly, the pillars can be spaced further apart and yet provide allnecessary support to the overlying conductors.

申请人：ADVANCED MICRO DEVCIES, INC.

代理人：Kevin L.Conley, Rose & Tayon Daffer

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